October 2026 Archives by thread

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Starting: Thu Oct 1 21:30:16 CEST 2026
Ending: Sun Oct 11 19:23:21 CEST 2026
Messages: 20

• [PATCH 1/2] hwf-riscv: detect Zvkb also from Zvbb   Jussi Kivilinna
  • [PATCH 2/2] rijndael-riscv-zvkned: VLEN agnostic bulk block processing   Jussi Kivilinna
• x86: Incorrect CPUID leaf in Zen 5 detection   HMBSbige
  • x86: Incorrect CPUID leaf in Zen 5 detection   Jussi Kivilinna
• [PATCH] hwf-x86: detect Zen5 by family and model   Jussi Kivilinna
• [PATCH] rijndael-vaes: simplify OCB L-array setup   Jussi Kivilinna
• [PATCH] cipher: add dependency tracking to custom compile rules   Jussi Kivilinna
• [PATCH] poly1305-avx512: fix lost carry in conversion from base 2^44   Jussi Kivilinna
  • [PATCH v2] poly1305-avx512: fix lost carry and bit 130 in base 2^44 conversions   Jussi Kivilinna
  • [PATCH] poly1305-p10le: fix lost carry in conversion from base 2^26   Jussi Kivilinna
• [PATCH 01/12] tests/bench-slope: add --buf-start option   Jussi Kivilinna
  • [PATCH 03/12] chacha20-riscv: use 4-field segment load/store in multi-block path   Jussi Kivilinna
  • [PATCH 04/12] chacha20-riscv: use generic C for less than four remaining blocks   Jussi Kivilinna
  • [PATCH 05/12] poly1305: add RISC-V vector intrinsics implementation   Jussi Kivilinna
  • [PATCH 06/12] sha512-riscv-zvknhb-zvkb: use LMUL=1 with VLEN>=256   Jussi Kivilinna
  • [PATCH 07/12] sm3: add RISC-V Zvksh intrinsics implementation   Jussi Kivilinna
  • [PATCH 08/12] sm4: add RISC-V Zvksed intrinsics implementation   Jussi Kivilinna
  • [PATCH 09/12] rijndael-riscv-zvkned: optimize OCB offset generation   Jussi Kivilinna
  • [PATCH 11/12] cipher-gcm-riscv-zvkg: use fractional LMUL for POLYVAL byte reversal   Jussi Kivilinna
  • [PATCH 12/12] simd-common-riscv: faster vector register clearing   Jussi Kivilinna

Last message date: Sun Oct 11 19:23:21 CEST 2026
Archived on: Sun Oct 11 19:56:31 CEST 2026

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