GPG's vulnerability to brute force

[Peter Lebbing]

On 2014-05-17 15:28, Robert J. Hansen wrote:
> Another way of looking at it: RAM is normally implemented as a 
> flipflop.

I think the register bank in a processor is still implemented as 
flipflops, and all computation ends up there (on a register machine)[1], 
so your statement is correct in that respect. A register bank is a RAM.

However, the word "normally" is not quite apt. What you normally call 
the RAM of your computer is DRAM, and DRAM is implemented by a charge on 
a capacitor. This achieves much higher densities on a chip than SRAM, 
but is also slower.

HTH,

Peter.

[1] Alternatively, in the registers between pipeline stages of the 
processor. If somebody knows about the latest CPU techniques and 
disagrees, by all means, enlighten me :). My knowledge pretty much ends 
at basic pipeline design, and is not up to speed with current CPU 
technology.
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