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<a href="https://gitlab.com/rafaelgieschke">Rafael Gieschke</a> created an issue: <a href="https://gitlab.com/gnutls/gnutls/-/issues/1282">#1282</a>
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<p dir="auto">If you try to run GnuTLS on a Linux kernel with the <code>noxsave</code> <a href="https://www.kernel.org/doc/html/latest/admin-guide/kernel-parameters.html" rel="nofollow noreferrer noopener" target="_blank">command-line parameter</a> set, it will (on CPUs with AVX2) be terminated with <code>SIGILL</code> at the <code>verzoupper</code> instruction in <a href="https://gitlab.com/gnutls/gnutls/-/blob/9571f3a9e202ca2eeb369bb320bb93b638bb718c/lib/accelerated/x86/elf/sha256-ssse3-x86_64.s#L4241">https://gitlab.com/gnutls/gnutls/-/blob/9571f3a9e202ca2eeb369bb320bb93b638bb718c/lib/accelerated/x86/elf/sha256-ssse3-x86_64.s#L4241</a>.</p>
<p dir="auto">The reason is that <code>_gnutls_x86_cpuid_s</code> is not calculated like <a href="https://gitlab.com/gnutls/gnutls/-/blob/9571f3a9e202ca2eeb369bb320bb93b638bb718c/lib/accelerated/x86/elf/sha256-ssse3-x86_64.s#L48"><code>sha256_block_data_order</code></a> expects it to be.</p>
<p dir="auto">In OpenSSL, <code>OPENSSL_ia32cap_P[4]</code> is essentially <code>= {CPUID.1:EDX, CPUID.1:ECX, CPUID.7:EBX, CPUID.7:ECX}</code> <strong>but</strong> with some heavy modifications (in assembly) done afterwards: <a href="https://github.com/openssl/openssl/blob/d5d95daba59adc41ab60ea86acd513f255fca3c0/crypto/x86_64cpuid.pl#L73" rel="nofollow noreferrer noopener" target="_blank">https://github.com/openssl/openssl/blob/d5d95daba59adc41ab60ea86acd513f255fca3c0/crypto/x86_64cpuid.pl#L73</a>. There is a more readable C version of the same code with explanations in BoringSSL: <a href="https://github.com/google/boringssl/blob/bb88f52261f3231005c7fa43e55cc888d2f9f582/include/openssl/cpu.h#L75" rel="nofollow noreferrer noopener" target="_blank">https://github.com/google/boringssl/blob/bb88f52261f3231005c7fa43e55cc888d2f9f582/include/openssl/cpu.h#L75</a>, <a href="https://github.com/google/boringssl/blob/bb88f52261f3231005c7fa43e55cc888d2f9f582/crypto/cpu-intel.c#L154" rel="nofollow noreferrer noopener" target="_blank">https://github.com/google/boringssl/blob/bb88f52261f3231005c7fa43e55cc888d2f9f582/crypto/cpu-intel.c#L154</a>.</p>
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<a id="user-content-bugs-in-gnutls" class="anchor" href="#bugs-in-gnutls" aria-hidden="true"></a>Bugs in GnuTLS</h2>
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<p><a href="https://gitlab.com/gnutls/gnutls/-/blob/9571f3a9e202ca2eeb369bb320bb93b638bb718c/lib/accelerated/x86/x86-common.c#L130"><code>read_cpuid_vals()</code></a> mixes up CPUID.1:EDX with CPUID.1:EBX, so that <code>_gnutls_x86_cpuid_s[0] = CPUID.1:EBX</code> instead of <code>= CPUID.1:EDX</code>.</p>
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<p><a href="https://gitlab.com/gnutls/gnutls/-/blob/9571f3a9e202ca2eeb369bb320bb93b638bb718c/lib/accelerated/x86/x86-common.c#L125"><code>read_cpuid_vals()</code></a> does neither check the OSXSAVE bit nor does it apply the other modifications done by the upstream code, e.g., it does not set <code>_gnutls_x86_cpuid_s[0] & (1 << 30)</code> on Intel CPUs (this bit originally was the <a href="https://en.wikipedia.org/wiki/CPUID#EAX=1:_Processor_Info_and_Feature_Bits" rel="nofollow noreferrer noopener" target="_blank">"IA64 processor emulating x86" bit</a>, is currently reserved (0) on current Intel CPUs and is (ab)used by the upstream code to indicate <strong>any</strong> Intel CPU).</p>
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<p>This results in <a href="https://gitlab.com/gnutls/gnutls/-/blob/9571f3a9e202ca2eeb369bb320bb93b638bb718c/lib/accelerated/x86/elf/sha256-ssse3-x86_64.s#L48"><code>sha256_block_data_order</code></a> (and other function) not following Intel's specified way to check for AVX(2/-512) support (i.e., check the OSXSAVE bit first): <a href="https://www.intel.com/content/dam/develop/external/us/en/documents-tps/325462-sdm-vol-1-2abcd-3abcd.pdf#page=353" rel="nofollow noreferrer noopener" target="_blank">https://www.intel.com/content/dam/develop/external/us/en/documents-tps/325462-sdm-vol-1-2abcd-3abcd.pdf#page=353</a>. If a CPU supports AVX(2/-512) but the operating system does not (e.g., Linux with <code>noxsave</code>), this will, thus, cause SIGILL.</p>
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<p>Not setting the Intel CPU bit (even if <code>read_cpuid_vals()</code> was fixed to set <code>_gnutls_x86_cpuid_s[0] = CPUID.1:EDX</code>), probably results in the AVX (without AVX2) code path's never being taken (<a href="https://gitlab.com/gnutls/gnutls/-/blob/9571f3a9e202ca2eeb369bb320bb93b638bb718c/lib/accelerated/x86/elf/sha256-ssse3-x86_64.s#L57">https://gitlab.com/gnutls/gnutls/-/blob/9571f3a9e202ca2eeb369bb320bb93b638bb718c/lib/accelerated/x86/elf/sha256-ssse3-x86_64.s#L57</a> checks <code>_gnutls_x86_cpuid_s[0]</code> for <code>1073741824 == 1 << 30</code>).</p>
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